Basic HTML version of Foils prepared 17 November 1998

Foil 10 3 Classes of VLSI Design?

From Master Foilset for HPC Achitecture Overview CPS615 Basic Simulation Track for Computational Science -- Fall Semester 98. by Geoffrey C. Fox
1 How good is instruction-level parallelism?
2 Thread-level parallelism needed in future microprocessors to use available transistors?
3 Threads need classic coarse grain data or functional parallelism
4 transistors
5 Exponential Improvement is (an example of) Moore's Law
in Table To:

© Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu

If you have any comments about this server, send e-mail to webmaster@npac.syr.edu.

Page produced by wwwfoil on Mon Apr 12 1999