Basic HTML version of Foils prepared 20 February 00

Foil 47 How to use more transistors?

From Introduction to Computational Science CPS615 Computational Science Class -- Spring Semester 2000. by Geoffrey C. Fox
1 Parallelism in processing
  • multiple operations per cycle reduces CPI
  • soon thread level parallelism
2 Cache to give locality in data access
  • avoids latency and reduces CPI
  • also improves processor utilization
3 Both need (transistor) resources, so tradeoff
4 ILP (Instruction Loop Parallelism) drove performance gains of sequential microprocessors
5 ILP Success was not expected by aficionado's of parallel computing and this "delayed" relevance of scaling "outer-loop" parallelism as user's just purchased faster "sequential machines"
6 CPI = Clock Cycles per Instruction
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