HELP!
* GREY=local
LOCAL HTML version of Foils prepared
July 2,1995
Foil 17 What Is HPCC?
From
NPAC Centric view of Federal HPCC Program Trip to China(Beijing,Harbin) by Don Leskiw --
June23-July 5,1995
.
by
Don Leskiw
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See also color IMAGE
What Is "High Performance"
Speed and Memory - Primary and Secondary
Multi- Purpose: Grand and National Challenges
Parallelism (and/or Distributed - NEW!)
All Computing Is Constantly Improving
High Performance Chips
Cycles per second
Instruction Sets, Pipelining, Superscalar (Multiple Instruction Issue)
Memory Hierarchies
Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu
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