Basic HTML version of Foils prepared
August 29 98
Foil 10 Shared Memory MIMD Multiprocessor
From
Designing and Building Parallel Programs I: Introduction DoD Modernization Tutorial --
1995-1998
.
by
Ian Foster, Gina Goff, Ehtesham Hayder, Chuck Koelbel
1
Processors access shared memory via bus
2
Low latency, high bandwidth
3
Bus contention limits scalability
4
Search for scalability introduces locality
Cache (a form of local memory)
Multistage architectures (some memory closer)
5
Examples: Cray T90, SGI PCA, Sun
in Table To:
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