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Foil 1 Processing-In-Memory (PIM) Architectures for Very High Performance MPP Computing

From Processing-In-Memory (PIM) Architectures for Very High Performance MPP Computing PAWS 96 Mandalay Beach -- April 21-26 1996. by Peter Kogge Notre Dame
1 Dr. Peter M. Kogge
2 McCourtney Prof. of Computer Science & Engr.
3 IEEE Fellow, IBM Fellow
4 Dr. Jay B. Brockman, Assistant Prof.
5 Dept. of Computer Science & Engr.
6 University of Notre Dame
7 219-631-6763
8 kogge@cse.nd.edu
in Table To:

Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu

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