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Superconducting distributed memory
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A conventional distributed memory design where each node consists of a superconducting CPU, superconducting memory and conventional DRAM memory.
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2 |
Distributed shared memory
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How far can the emerging distributed shared memory concept can be extended? Can a Pflop/s system be constructed from one or a number of DSM systems?
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3 |
A more aggressive PIM design
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Essentially a general purpose Grape where we use half the silicon for as many "optimal" (250,000 transistor according to Kogge) CPU's that we can
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