Basic HTML version of Foils prepared August 4 1996

Foil 42 Requested Capabilities in Hardware Architecture

From Summary of Working Groups at PAWS and PetaSoft Meetings PAWS(Mandalay Beach) and PetSoft(Bodega Bay) -- April 23 and June 17-19,96. by Geoffrey C. Fox
1 Global Address Space
  • Can name all levels of hierarchy -- accessible from external subsystem
  • Cache coherence is not required
  • Varied granularity of access required
2 Cheap Synchronization with for instance Tag Bits
3 Exposed Mechanisms for keeping the processor utilized during long latency operations
  • Prefetching
  • Fast context switching
  • Thread support
4 To be continued
in Table To:

Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu

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