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Basic foilset Software Strategy for JNAC (PetaFlops) Initiative

Given by Geoffrey C. Fox at JNAC (PetaFlops) Presentation on August 28,1996. Foils prepared August 23 1996
Outside Index Summary of Material

This was part of a set of PetaFlop (JNAC) Presentations to group of Federal Program Managers
JNAC = Joint National Advanced Computing Initiative
First we describe Software Strategy in context of Multilevel Systems Architecture
Three Foils describe a general comparison between JNAC and HPCC
Finally some back up foils give more detail

Table of Contents for full HTML of Software Strategy for JNAC (PetaFlops) Initiative

 Denote Foils where Image Critical
Denote Foils where HTML is sufficient
1 Suggested Software Strategy for JNAC (aka Petaflops) Initiative
2 Some Key Observations on PetaSoft Software
3 Architectural Framework from PetaSoft Meeting
4 Hierarchy from Application to Complex Computer
5 The Current HPCC Program Execution Model (PEM) illustratrated by MPI/HPF
6 The PetaSoft Program Execution Model
7 Some Examples of a Layered Software System
8 Features of JNAC Software Implementation Strategy
9 Role of The Architecture Review Board
10 The Five Key JNAC Software Development Areas
11 Now we follow with A Comparison of JNAC and HPCC
12 Comparison of HPCC and JNAC - I
13 Comparison of HPCC and JNAC - II
14 Comparison of HPCC and JNAC - III
15 The Rest of Presentation is for Background Only!
16 Examples of Machine Specific Software
17 Examples of Operating System Services I
18 Examples of Operating System Services II
19 General Philosophy from PetaSoft Meeting
20 Features of the The Layered Software Model
21 PetaSoft Findings 1) and 2) -- Memory Hierarchy
22 PetaSoft Findings 3) and 4) -- Using Memory Hierarchy
23 PetaSoft Findings 5) and 6) -- Layered Software
24 PetaSoft Recommendations 1) to 3) Memory and Software Hierarchy
25 Time for a Software Revolution?
26 Hierarchy from Application to Complex Computer
27 The 8 NSF Point Designs

Outside Index Summary of Material

HTML version of Basic Foils prepared August 23 1996

Foil 1 Suggested Software Strategy for JNAC (aka Petaflops) Initiative

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
August 28 1996
Geoffrey Fox
HTML version of Basic Foils prepared August 23 1996

Foil 2 Some Key Observations on PetaSoft Software

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
All proposed hardware architectures have a complex memory hierarchy which should be abstracted with a software architecture
  • Consisting of a mix of machine specific and generic levels with well defined ADI's or Abstract Device Interfaces
  • Management of latency with concurent threads or otherwise critical
This implies a layered software architecture reflected in all components
  • Compiler Language and Runtime, Tools, Systems Software etc.
The Software Architecture should be defined early on so that hardware and software respect it!
  • JNAC Architecture Review Board will be responsible for interfaces and evaluating compliance with them
Users and Compilers must be able to have full control of data movement and placement in all parts of petaflop system
Size and Complex Memory Structure of PetaFlop machines represent major challenges in scaling existing Software Concepts
HTML version of Basic Foils prepared August 23 1996

Foil 3 Architectural Framework from PetaSoft Meeting

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
PetaFlop Applications which are grouped into sets with an interface to their own
Problem Solving Environments
Application Level or Virtual Problem Interface ADI
Operating System Services
Multi Resolution Virtual Machine Interfaces joining at lowest levels with
Machine Specific Software
Hardware Systems
HTML version of Basic Foils prepared August 23 1996

Foil 4 Hierarchy from Application to Complex Computer

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
Domain Specific Application Problem Solving Environment
Numerical Objects in (C++/Fortran/C/Java) High Level Virtual Problem
Expose the Coarse Grain Parallelism of the Real Complex Computer
Expose All Levels of Memory Hierarchy of the Real Complex Computer
Virtual
Problem /Appl. ADI
Multi
Level
Machine ADI
HTML version of Basic Foils prepared August 23 1996

Foil 5 The Current HPCC Program Execution Model (PEM) illustratrated by MPI/HPF

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
MPI represents data movement with the abstraction for a structure of machines with just two levels of memory
  • On Processor and Off Processor
This was a reasonable model in the past but even today fails to represent complex memory structure of typical microprocessor node
Note HPF Distribution Model has similar (to MPI) underlying relatively simple Abstraction for PEM
HTML version of Basic Foils prepared August 23 1996

Foil 6 The PetaSoft Program Execution Model

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
This addresses memory hierarchy intra-processor as well as inter-processor
  • Data Movement and Replication defined between Processors as well as between levels of hierarchy on a given processor
Level 2 Cache
Level 1 Cache
HTML version of Basic Foils prepared August 23 1996

Foil 7 Some Examples of a Layered Software System

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
Application Specific Problem Solving Environment
Coarse Grain Coordination Layer e.g. AVS
Massively Parallel Modules (libraries) -- such as DAGH HPF F77 C HPC++ HPJava
Fortran or C plus generic message passing (get,put) and generic memory hierarchy and locality control
Assembly Language plus specific (to architecture) data movement, shared memory and cache control
High
Level
Low Level
HTML version of Basic Foils prepared August 23 1996

Foil 8 Features of JNAC Software Implementation Strategy

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
Main JNAC Program is a mix of both research and development with
Development is focused on JNAC machines and identified application areas and along lines of a Broad Systems Architecture established (evaluated and evolved) by JNAC
Work should start now on initial studies to explore the possible system architectures and
Suggest locations for the "sweet-spots" (necks in the hour glass) to define interfaces
These "petaflop software point studies" should be interdisciplinary involving hardware, systems software and applications expertise
HTML version of Basic Foils prepared August 23 1996

Foil 9 Role of The Architecture Review Board

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
Establish and Review Software Architecture and consistent use of Interfaces
}
}
}
}
JNAC Architecture Review
Board
The Five Software Development Areas
}
HTML version of Basic Foils prepared August 23 1996

Foil 10 The Five Key JNAC Software Development Areas

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
The mission Critical Applications
Development of Approximately 3 shared Problem Solving Environments with rich set of application targeted libraries and resources
  • e.g. PSE's for PDE's, Image Analysis, Forces Modeling
Development of Common Systems Software
Programming Environments from Compilers to multi-level runtime support at the machine independent ADI's
Machine Specific software including lowest level of data movement/manipulation
HTML version of Basic Foils prepared August 23 1996

Foil 11 Now we follow with A Comparison of JNAC and HPCC

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
Next Three foils isolate some differences and commonalities in two programs
HTML version of Basic Foils prepared August 23 1996

Foil 12 Comparison of HPCC and JNAC - I

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
Both set a hardware goal (teraflop for HPCC and petaflop for JNAC) to focus activity but in each case systems and applications were main justification
Both couple applications with software and architectures in multidisciplinary teams with multi-agency support
HPCC was dominantly research
  • JNAC is roughly 50-50 research and development
HPCC inevitably developed MPP's and transferred parallel computing to computing mainstream
  • JNAC's challenge is memory hierarchy and will transfer understanding of this to mainstream independent of parallelism
HTML version of Basic Foils prepared August 23 1996

Foil 13 Comparison of HPCC and JNAC - II

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
HPCC aimed at Grand challenges in Industry Government and Academia
  • JNAC aimed at government (including NSF) mission critical applications
HPCC developed software (PSE's) largely independently in each Grand Challenge
  • JNAC will link software efforts to a few PSE's and a common set of JNAC Interfaces
HPCC tended to develop hardware with rapidly changing architectures which software "chased" rather laboriously
  • JNAC develops software simultaneously with hardware and to a uniform common architecture allowing better re-use of both application and systems software
HTML version of Basic Foils prepared August 23 1996

Foil 14 Comparison of HPCC and JNAC - III

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
HPCC aimed to transfer technology to Industry for commercialization
  • JNAC relies on industry to build systems designed by laboratory, university and industry consortia
HPCC is Research -->Capitalization-->Product
  • JNAC is mission driven development linked to supporting research with engineering prototypes as capitalization stage
HPCC was a broad program aimed at "all" (large scale) users of computers
  • JNAC is a focused program and aims at "top 100" power users
HTML version of Basic Foils prepared August 23 1996

Foil 15 The Rest of Presentation is for Background Only!

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
Material from PetaSoft Conference and later discussions
HTML version of Basic Foils prepared August 23 1996

Foil 16 Examples of Machine Specific Software

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
code generation
memory management
routing/interconnect
thread management
diagnostics
fault containment
interupt handling
device drivers
HTML version of Basic Foils prepared August 23 1996

Foil 17 Examples of Operating System Services I

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
scalable filesystems
networking interfaces
scheduling
HL-memory management
HL-latency management
performance data
debugging tools
intermediate code representations
HTML version of Basic Foils prepared August 23 1996

Foil 18 Examples of Operating System Services II

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
object files (a.out)
HL-resource management
query of systems state
operating systems services
compiler middleware
basic visualization tools
numerical libraries
HTML version of Basic Foils prepared August 23 1996

Foil 19 General Philosophy from PetaSoft Meeting

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
Define a "clean" model for machine architecture
  • Memory hierarchy including caches and geomterical (distributed) effects
Define a low level "Program Execution Model" (PEM) which allows one to describe movement of information and computation in the machine
  • This can be thought of as "MPI"/assembly language of the machine
On top of low level PEM, one can build an hierarchical (layered) software model
  • At the top of this layered software model, one finds objects or Problem Solving Environments (PSE's)
  • At an intermediate level there is Parallel C C++ or Fortran
One can program at each layer of the software and augment it by "escaping" to a lower level to improve performance
  • Directives (HPF assertions) and explicit insertion of lower level code (HPF extrinsics) are possible
HTML version of Basic Foils prepared August 23 1996

Foil 20 Features of the The Layered Software Model

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
This is not really a simple stack but a set of complex relations between layers with many interfaces and modules
Interfaces are critical ( for composition across layers)
  • Enable control and performance for application scientists
  • Decouple CS system issues and allow exploration and innovation
Enable Next
10000
Users
For First 100
Pioneer Users
Higher Level abstractions
nearer to
application domain
Increasing Machine
detail, control
and management
HTML version of Basic Foils prepared August 23 1996

Foil 21 PetaSoft Findings 1) and 2) -- Memory Hierarchy

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
1)Deep Memory Hierarchies present New Challenges to High performance Implementation of programs
  • Latency
  • Bandwidth
  • Capacity
2)There are two dimensions of memory hierarchy management
  • Geometric or Global Structure
  • Local (cache) hierachies seen from thread or processor centric view
HTML version of Basic Foils prepared August 23 1996

Foil 22 PetaSoft Findings 3) and 4) -- Using Memory Hierarchy

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
3)One needs a machine "mode" which supports predictable and controllable memory system leading to communication and computation with same characteristics
  • Allow Compiler optimization
  • Allow Programmer control and optimization
  • For instance high performance would often need full program control of caches
4)One needs a low level software layer which provides direct control of the machine (memory hierarchy etc.) by a user program
  • This for initial users and program tuning
HTML version of Basic Foils prepared August 23 1996

Foil 23 PetaSoft Findings 5) and 6) -- Layered Software

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
5)One needs a layered (hierarchical) software model which supports an efficient use of multiple levels of abstraction in a single program.
  • Higher levels of Programming model hide extraneous complexity
  • highest layers are application dependent Problem Solving Environments and lower levels are machine dependent
  • Lower levels can be accessed for additional performance
  • e.g. HPF Extrinsics. Gcc ASM, MATLAB Fortran Routines, Native classes in Java
6)One needs a set of software tools which match the layered software (programming model)
  • Debuggers, Performance and load balancing tools
HTML version of Basic Foils prepared August 23 1996

Foil 24 PetaSoft Recommendations 1) to 3) Memory and Software Hierarchy

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
1)Explore issues in design of petaComputer machine models which will support the controllable hierarchical memory systems in a range of important architectures
  • Research and development in areas of findings 3) and 4)
2)Explore techniques for control of memory hierarchy for petaComputer architectures
  • Use testbeds
3)Explore issues in designing layered software architectures -- particularly efficient mapping and efficient interfaces to lower levels
  • Use context of petaflop applications and machines
  • e.g. HPF is a possible layer while HPF Extrinsics is an interface to a lower (MPI) layer
HTML version of Basic Foils prepared August 23 1996

Foil 25 Time for a Software Revolution?

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
Well the rest of the Software World is Changing with emergence of WebWindows Environment!
Current approaches (HPF,MPI) lack needed capability to address memory hierarchy of either today's or any future contemplated high performance architecture -- whether sequential or parallel
Problem Solving Environments are needed to support complex applications implied by both Web and increasing capabilities of scientific simulations
So I suggest rethinking High Performance Computing Software Models and Implementations!
HTML version of Basic Foils prepared August 23 1996

Foil 26 Hierarchy from Application to Complex Computer

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
Domain Specific Application Problem Solving Environment
Numerical Objects in (C++/Fortran/C/Java) High Level Virtual Problem
Expose the Coarse Grain Parallelism of the Real Complex Computer
Expose All Levels of Memory Hierarchy of the Real Complex Computer
Virtual
Problem /Appl. ADI
Multi
Level
Machine ADI
Pure Script (Interpreted)
High Level Language but Optimized Compilation
Machine Optimized RunTime
Semi-Interpreted
a la Applets
HTML version of Basic Foils prepared August 23 1996

Foil 27 The 8 NSF Point Designs

From Software Strategy for JNAC (PetaFlops) Initiative JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
Relatively Conventional but still Innovative!
  • Andrew Chien et al. (Illinois) Reconfiguarable MORPH Architecture
  • Torrellas, Padua (Illinois) Aggressive Cache-Only Memory Architecture Multiprocessor (I-Acoma)
  • Ziavras et al. (NJIT, Wayne State) Optical Interconnect with Conventional Processors and Memory
  • Kumar and Sameh (Minnesota) Focus on Algorithms for Hybrid Systems (Clusters of clusters of deep memory hierarchies)
  • Fortes and Taylor(Purdue/Northwestern)Application focus on using Hierarchical Processors and Memory Architecture
Special Purpose Systems
  • McMillan, Hut et al. (Drexel, Princeton, Tokyo, Illinois) Special Purpose GRAPE System for N body Problems
Architecture Innovation (Perhaps Special Purpose)
  • Kogge et al. (Notre Dame) Processor in Memory (PIM) Technology Point Design
Radical Technology Innovation (Superconducting Processors)
  • Sterling et al. (Caltech, SUNY-SB,McGill) HTMT: Hybrid Technology Multi-Threaded Architecture
Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu

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