Basic HTML version of Foils prepared Sept 19, 1996

Foil 29 V. A National program concept: Research Projects - Technology

From PetaFlop(JNAC) Overview Presentations -- Results of Studies and Next Steps Sep 19,96 NSTC Committee Presentation -- Sept 19,1996. by Paul Smith DoE
1 Chip Interface:
  • Fabrication Technology
  • Laser & CMOS chip integration
2 Optical Networks:
  • Pbps bandwidths
  • 1000 ports
3 Superconducting Memories:
  • 100 billion accesses/sec.
4 Holographic Memories
in Table To:

Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu

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