NPAC Technical Report SCCS-257
Benchmarking the CM-5 multicomputer
Zeki Bozkus, Sanjay Ranka, Geoffrey Fox
Submitted March 02 1992
Abstract
This paper describes the performance evaluation and modeling
of the CM-5 multiprocessor. We provide a number of benchmarks
for its communication and computation performance. We have also
benchmarked many operations, like scans and global reduction,
that can be performed using special hardware available on the
CM-5. Most of these operations are are modeled using regression
on appropriate parameters.
These models are used to predict the performance of Gaussian
Elimination on the CM-5. Comparative timing on the Intel Touchstone
Delta machine are also provided.
We also describe how to efficiently embed a mesh and a hypercube on a
CM-5 architecture and provide timings for some mesh and hypercube
communication primitives on the CM-5.