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Parallel Computing for the Power Utility Industry

We believe that a power utility's interests in future parallel architectures will be in scalable parallel processors (SPPs) rather than massively parallel processors (MPPs), because:

  1. the compatibility of SPP nodes with networked desktop computing resources contributes to reduced business overhead costs,
  2. small to midsized SPPs offer an improved cost/performance ratio when compared to small MPPs.
We can expect future SPP architectures to be similar to the IBM SP-series with 2-64 processors interconnected by a non-blocking, high-bandwidth, switched network [16]. Internode communications performance may soon approach that of the Cray T3D massively parallel computer (1 second latency and 300 megabytes per second bandwidth) [43]. When comparing the single processor performance of the CM-5 (a 33 MHz Sparc microprocessor from Sun Microsystems) [6] with a node of the Cornell Theory Center SP1 or Northeast Parallel Architectures Center (NPAC) SP2 (a 62.5 MHz IBM RS/6000 model 370 four command superscalar microprocessor), we have shown in section 7.1, that the IBM RS/6000 microprocessor in the SP1 is 6.6 times faster than the 33 MHz Sparc microprocessor when comparing empirical data from our algorithm run on a single processor. The speed for the microprocessor in the Cornell Theory Center SP2 is even 50% faster than the SP1 RS/6000 microprocessor. In the near-future, it will be feasible to get four times the individual processor power that is now available on the SP1, so it is conceivable that the future generation of SPP microprocessors will be 25 times as fast as those used in the Thinking Machines CM-5. Some of this processing power may come from placing multiple shared-memory processors per SPP node [16],

If SPP node processor capability increases by a factor of 25 relative to the Thinking Machines CM-5, communications capabilities must improve by at least as much if parallel sparse direct linear solver performance for power systems applications is to have equal or better multiple processor speedup. In other words, the computation-to-communications ratio for the SPP must remain constant or improve in order that SPP speedup remains constant or improves.



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David P. Koester
Sun Oct 22 17:27:14 EDT 1995