Next: Compiling the ALIGN Up: Distribution Model Previous: Expressive Power of

Design Methodology

The Fortran 90D/HPF compiler maps arrays to physical processors using a three stage mapping as shown in Figure . This three stage mapping has also been proposed in HPF[2].

Stage 1 : ALIGN directives are processed to compute functions that map the array index domain to the template index domain and vice versa. Also, the local shape of the arrays it determined.

Stage 2 : Each dimension of the template is mapped onto the logical processor grid based on the distribution directives. Furthermore, mapping functions are computed to generate the relationship between global and local indices.

Stage 3 : The logical processor grid is mapped onto the physical system. This mapping can change from one system to another but the data mapping onto logical processor grid does not need to change. This enhances portability across a large number of architectures.

By performing this three stage mapping, the compiler is decoupled from the specifics of a given machine or configuration.


zbozkus@
Thu Jul 6 21:09:19 EDT 1995