Basic HTML version of Foils prepared June 1996

Foil 2 Acknowledgements

From Processing-In-Memory (PIM) Architectures for Very High Performance MPP Computing PAWS 96 Mandalay Beach -- April 21-26 1996. by Peter Kogge Notre Dame
1 Project Origins: IBM FSD EXECUBE chip
  • With foundry service from IBM Japan, Yasu
2 Current project funding includes:
  • NASA Grant NAG 5-2998 "PIM Architectures for Petaflops Computing"
  • NEC Research Institute: "High Speed Image Retrieval Techniques"
  • NSF Grant MIP95-03682, "Inherently Low Power Computers"
in Table To:

Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu

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