Basic HTML version of Foils prepared June 1996

Foil 26 EXECUBE: The First High Density PIM

From Processing-In-Memory (PIM) Architectures for Very High Performance MPP Computing PAWS 96 Mandalay Beach -- April 21-26 1996. by Peter Kogge Notre Dame
1 4 Mbit DRAM + 100K Gate base: 5V, 2.7W
2 Single part type: NO GLUE!
3 SIMD & MIMD - In Any Combination
4 Huge increase in BW, pins, silicon.. utilization
5 register
6 instruction
7 register
8 register
9 array
10 register
11 32Kx9 DRAM
12 macro
13 32Kx9 DRAM
14 macro
15 ALU
16 SIMD
17 MIMD
18 mode
19 SIMD
20 Broadcast Bus
21 decode
22 logic
23 DMA
24 logic
in Table To:

Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu

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