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The SIMD architecture consists
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Many (typically simple) processors, with some local memory.
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Executing the same instruction in lockstep, on a small piece of data in its local memory, with the instructions issued by the controller processor.
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Such architectures are good for applying algorithms which require the same operation on a large array of elements, however, they suffer badly if the problem results in load imbalances as the processors synchronise after every step. This is not usually a problem for data parallel programs.
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Examples - AMT DAP - Maspar
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