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Master Set B of Overview Material on Parallel Computing for CPS615

Parallel Computer and Network Architecture

Overview of Issues including synchronization, granularity and 3 classes of architectures

More details on networks

More details on system architectures

Table of Contents for Master Set B of Overview Material on Parallel Computing for CPS615

001 Computational Science CPS615
    Simulation Track Overview
    Foilsets B 1995
002 Abstract of CPS615 Foilsets B 1995
003 Overview of 
    Parallel Hardware Architecture
004 3 Major Basic Hardware Architectures
005 Examples of the Three Current Concurrent Supercomputer 
    Architectures
006 Parallel Computer Architecture Issues
007 General Types of Synchronization
008 Granularity of Parallel Components
009 Types of Parallel Memory Architectures
    -- Logical Structure
010 Types of Parallel Memory Architectures -- Physical Characteristics
011 Diagrams of Shared and Distributed Memories
012 Classes of Communication Network include ...
013 Survey of Issues in Communication Networks
014 Glossary of Useful Concepts in Communication Systems
015 Switch and Bus based Architectures
016 Point to Point Networks (Store and Forward) -- I
017 Examples of Interconnection Topologies
018 Degree and Diameter of Ring and Mesh(Torus) Architectures
019 Degree and Diameter of Hypercube and Tree Architectures
020 Point to Point Networks (Store and Forward) -- II
021 Latency and Bandwidth of a Network
022 Transfer Time in Microseconds for both Shared Memory Operations 
    and Explicit Message Passing
023 Latency/Bandwidth Space for 0-byte message(Latency) and 1 MB 
    message(bandwidth).
024 Switches versus Processor Networks
025 Circuit Switched Networks
026 Let's Return to General Parallel Architectures in more detail
027 Overview of Computer Architecture Issues
028 Some Global Computer Architecture Issues
029 Two General Real World Architectural Issues
030 MIMD Distributed Memory Architecture
031 Some MIMD Architecture Issues
032 SIMD (Single Instruction Multiple Data) Architecture
033 SIMD Architecture Issues
034 Shared Memory Architecture
035 The General Structure of a full sized CRAY C-90
036 The General Structure of a NEC SX-3
    Classic Vector Supercomputer
037 Comparison of MIMD and SIMD Parallelism seen on Classic Vector 
    Supercomputers
038 Shared versus Distributed Memory
039 What will happen in the year 2015 with .05 micron feature size and
     Petaflop Supercomputers using CMOS
040 CMOS Technology and Parallel Processor Chip Projections
041 Processor Chip Requirements for a Petaflop Machine Using 0.05 
    Micron Technology
042 Three Designs for a Year 2015 Petaflops machine with 0.05 micron 
    technology
043 The Global Shared Memory Category I Petaflop Architecture
044 Category II Petaflop Architecture -- Network of microprocessors
045 Category III Petaflop Design -- Processor in Memory (PIM)
046 Necessary Latency to Support Three Categories
047 Chip Density Projections to year 2013
048 DRAM Chip count for Construction of Petaflop computer in year 2013
     using 64 Gbit memory parts
049 Memory Chip Bandwidth in Gigabytes/sec
050 Power and I/O Bandwidth (I/O Connections) per Chip throught the 
    year 2013
051 Clock Speed and I/O Speed in megabytes/sec per pin  through year 
    2013
052 Rules for Making Hypercube Network Topologies
053 Mapping of Hypercubes into Three Dimensional Meshes
054 Mapping of Hypercubes into One Dimensional Systems
055 The One dimensional Mapping can be thought of as for one 
    dimensional problem solving or one dimensional layout of chips  
    forming hypercube
056 Hypercube Versus Mesh Topologies
057 Switches Versus Networks versus Fat Meshes
058 Basic Parallel Computer Architecture
059 Shared and Hierarchical Memory Computers
060 Homogeneous and Hierarchical Memory Multicomputers
061 Cache Coherency
062 Hybrid Distributed/Shared Memory Architectures
063 The INTEL Delta MIMD Distributed Memory Machine
064 Delta System  Overview 
065 Delta System Architecture
066 Delta System Hardware Configuration
067 Characteristics of INTEL i860 Compute Node
068 Delta System Communication Network
069 Delta Comunication Network (cont'd)
070 Road Map to Paul Messina's Chapter 2 of Parallel Computing Works 
    -- I
071 Road Map to Paul Messina's Chapter 2 of Parallel Computing Works 
    -- II
072 Road Map to Paul Messina's Chapter 2 of Parallel Computing Works 
    -- III
073 Road Map to Paul Messina's Chapter 2 of Parallel Computing Works 
    -- IV
074 Performance of High End Machines Years 1940-2000
075 Performance of High End Machines Years 1980-2000