Basic HTML version of Foils prepared 19 September 1997

Foil 39 Parallel Computer Architecture Control Structure

From Master Set of Foils for 1997 Session of CPS615 CPS615 Basic Simulation Track for Computational Science -- Fall Semester 97. by Geoffrey C. Fox
1 SIMD -lockstep synchronization
  • Each processor executes same instruction stream
2 MIMD - Each Processor executes independent instruction streams
3 MIMD Synchronization can take several forms
  • Simplest: program controlled message passing
  • "Flags" (barriers,semaphores) in memory - typical shared memory construct as in locks seen in Java Threads
  • Special hardware - as in cache and its coherency (coordination between nodes)
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