Basic HTML version of Foils prepared 23 August 1998

Foil 22 Sequential Memory Structure

From CPS615-Introduction-Course,Driving Technology and HPCC Current Status and Futures CPS615 Basic Simulation Track for Computational Science -- Fall Semester 98. by Geoffrey C. Fox, (Some Culler, Koelbel material)
1 Data locality implies CPU finds information it needs in cache which stores most recently accessed information
2 This means one reuses a given memory reference in many nearby computations e.g.
3 A1 = B*C
4 A2 = B*D + B*B
5 .... Reuses B
6 Processor
7 Cache
8 L2 Cache
9 L3 Cache
10 Main
11 Memory
12 Disk
13 Increasing Memory
14 Capacity Decreasing
15 Memory Speed (factor of 100 difference between processor
16 and main memory
17 speed)
in Table To:

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