Basic advance is decreasing feature size ( ??)
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Circuits become either faster or lower in power
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Die size is growing too
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Clock rate improves roughly proportional to improvement in ?
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Number of transistors improves like ????(or faster)
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Performance > 100x per decade; clock rate 10x, rest of increase is due to transistor count
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How to use more transistors?
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Parallelism in processing
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multiple operations per cycle reduces CPI
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Locality in data access
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avoids latency and reduces CPI
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also improves processor utilization
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Both need resources, so tradeoff
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Fundamental issue is resource distribution, as in uniprocessors
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CPI = Clock Cycles per Instruction
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