Basic HTML version of Foils prepared
10 Sept 1996
Foil 33 Parallel Computer Architecture Control Structure
From
New CPS615Master Foils-- 26 August 96 Basic Simulation Track for Computational Science CPS615 --
Fall Semester 96
.
by
Geoffrey C. Fox
SIMD -lockstep synchronization
Each processor executes same instruction stream
MIMD - Each Processor executes independent instruction streams
MIMD Synchronization can take several forms
Simplest: program controlled message passing
"Flags" (barriers,semaphores) in memory - typical shared memory construct as in locks seen in Java Threads
Special hardware - as in cache and its coherency (coordination between nodes)
©
on Tue Oct 7 1997
Basic HTML version of Foils prepared 10 Sept 1996
