Find this at http://www.npac.syr.edu/users/gcf/cps615sept1096/

CPS615-Lecture on Performance(end) and Computer Technologies(start)

Given by Geoffrey C. Fox at Delivered Lectures of CPS615 Basic Simulation Track for Computational Science on 10 September 96. Foils prepared 27 october 1996

This starts by filling in details of communication overhead in parallel processing for case where "range" of interaction is large
We show two old examples from Caltech illustrates correctness of analytic form
We return to discussion of computer architectures describing
  • Vector Supercomputers
  • General Relevance of data locality and pipelining
  • Flynn's classification (MIMD,SIMD etc.)
  • Memory Structures
  • Initial issues in MIMD and SIMD discussion


This mixed presentation uses parts of the following base foilsets which can also be looked at on their own!
CPS615Master96                Master Set of Foils for 1996 Session of 
                               CPS615
CPS615-95C                    CPS615 Foils -- set C: Laplace Example 
                               -- Programming Models and Performance

Table of Contents for CPS615-Lecture on Performance(end) and Computer Technologies(start)



CPS 615 Lectures 1996 Fall Semester -- September 10

We first finish the discussion of overhead (tcomm/tcalc) as we added a few foils that we noted last time were missing!
                CPS615Master96 053 001 Delivered Lectures for CPS615 
                                       -- Base Course for the 
                                       Simulation Track of 
                                       Computational Science
                                       Fall Semester 1996 --
                                       Lecture of September 10 - 1996
                CPS615Master96 054 002 Abstract of Sept 10 1996 CPS615
                                        Lecture
                    CPS615-95C 043 003 Communication to Calculation 
                                       Ratio as a function of template
                                        
                    CPS615-95C 044 004 Performance for Increasing 
                                       Stencil
                    CPS615-95C 045 005 Matrix Multiplication on the 
                                       Hypercube
                    CPS615-95C 046 006 Efficiency of QCD Physics 
                                       Simulation on JPL MarkIIIfp 
                                       Hypercube

We continue A Brief Discussion of Computer Architectures
                CPS615Master96 022 007 Architecture Classes of High 
                                       Performance Computers
                CPS615Master96 023 008 von Neuman Architecture in a 
                                       Nutshell
                CPS615Master96 024 009 Illustration of Importance of 
                                       Cache
                CPS615Master96 025 010 Vector Supercomputers in a 
                                       Nutshell - I
                CPS615Master96 026 011 Vector Supercomputing in a 
                                       picture
                CPS615Master96 027 012 Vector Supercomputers in a 
                                       Nutshell - II
                CPS615Master96 028 013 Flynn's Classification of HPC 
                                       Systems
                CPS615Master96 029 014 Parallel Computer Architecture 
                                       Memory Structure
                CPS615Master96 030 015 Comparison of Memory Access 
                                       Strategies
                CPS615Master96 031 016 Types of Parallel Memory 
                                       Architectures -- Physical 
                                       Characteristics
                CPS615Master96 032 017 Diagrams of Shared and 
                                       Distributed Memories
                CPS615Master96 033 018 Parallel Computer Architecture 
                                       Control Structure
                CPS615Master96 034 019 Some Major Hardware 
                                       Architectures - MIMD
                CPS615Master96 035 020 MIMD Distributed Memory 
                                       Architecture

List of Foils Used as they occur

CPS615Master96                Master Set of Foils for 1996 Session of 
                               CPS615
53 54 22 23 24 25 26 27 28 29 30 31 32 33 34 35
CPS615-95C                    CPS615 Foils -- set C: Laplace Example 
                               -- Programming Models and Performance
43 44 45 46

Sorted List of Foils Used

CPS615Master96                Master Set of Foils for 1996 Session of 
                               CPS615
22 23 24 25 26 27 28 29 30 31 32 33 34 35 53 54
CPS615-95C                    CPS615 Foils -- set C: Laplace Example 
                               -- Programming Models and Performance
43 44 45 46


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