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CPS615-Lecture on Computer Architectures and Networks

Given by Geoffrey C. Fox at Delivered Lectures of CPS615 Basic Simulation Track for Computational Science on 12 September 96. Foils prepared 11 November 1996

This continues the computer architecture discussion with
  • MIMD and SIMD with distributed shared memory
  • MetaComputers
  • Special Purpose Architectures
  • Granularity with technological changes forcing larger process sizes
  • Overview of Communication Networks with
    • Switches versus topologies versus buses
    • Typical values in today's machines


This mixed presentation uses parts of the following base foilsets which can also be looked at on their own!
CPS615Master96                Master Set of Foils for 1996 Session of 
                               CPS615
CPS615-95B                    Master Set B of Overview Material on 
                               Parallel Computing for CPS615 Foils

Table of Contents for CPS615-Lecture on Computer Architectures and Networks



CPS 615 Lectures 1996 Fall Semester -- September 12
                CPS615Master96 055 001 Delivered Lectures for CPS615 
                                       -- Base Course for the 
                                       Simulation Track of 
                                       Computational Science
                                       Fall Semester 1996 --
                                       Lecture of September 12 - 1996
                CPS615Master96 056 002 Abstract of Sept 12 1996 CPS615
                                        Lecture

We continue A Brief Discussion of Computer Architectures
                CPS615Master96 033 003 Parallel Computer Architecture 
                                       Control Structure
                CPS615Master96 034 004 Some Major Hardware 
                                       Architectures - MIMD
                CPS615Master96 035 005 MIMD Distributed Memory 
                                       Architecture
                CPS615Master96 036 006 Some Major Hardware 
                                       Architectures - SIMD
                CPS615Master96 037 007 SIMD (Single Instruction 
                                       Multiple Data) Architecture
                CPS615Master96 038 008 Some Major Hardware 
                                       Architectures - Mixed
                CPS615Master96 039 009 Some MetaComputer Systems
                CPS615Master96 040 010 Comments on Special Purpose 
                                       Devices
                CPS615Master96 041 011 The GRAPE N-Body Machine
                CPS615Master96 042 012 Why isn't GRAPE a Perfect 
                                       Solution?
                CPS615Master96 043 013 Granularity of Parallel 
                                       Components - I
                CPS615Master96 044 014 Granularity of Parallel 
                                       Components - II
                CPS615Master96 046 015 Switch and Bus based 
                                       Architectures
                CPS615Master96 045 016 Classes of Communication 
                                       Networks
                CPS615Master96 047 017 Examples of Interconnection 
                                       Topologies
                CPS615Master96 048 018 Useful Concepts in 
                                       Communication Systems
                CPS615Master96 049 019 Communication Performance of 
                                       Some MPP's
                CPS615Master96 050 020 Implication of Hardware 
                                       Performance
                    CPS615-95B 021 021 Latency and Bandwidth of a 
                                       Network
                    CPS615-95B 022 022 Transfer Time in Microseconds 
                                       for both Shared Memory 
                                       Operations and Explicit Message
                                        Passing
                    CPS615-95B 023 023 Latency/Bandwidth Space for 
                                       0-byte message(Latency) and 1 
                                       MB message(bandwidth).

List of Foils Used as they occur

CPS615Master96                Master Set of Foils for 1996 Session of 
                               CPS615
55 56 33 34 35 36 37 38 39 40 41 42 43 44 46 45 47 48 49 50
CPS615-95B                    Master Set B of Overview Material on 
                               Parallel Computing for CPS615 Foils
21 22 23

Sorted List of Foils Used

CPS615Master96                Master Set of Foils for 1996 Session of 
                               CPS615
33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 55 56
CPS615-95B                    Master Set B of Overview Material on 
                               Parallel Computing for CPS615 Foils
21 22 23


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