HELP! * YELLOW=global GREY=local Global HTML version of Foils prepared July 6 1996

Foil 39 The PetaSoft Program Execution Model

From HPCC Futures Topic 2:A Possible PetaFlop Initiative Trip to China -- July 12-28,96. by Geoffrey Fox, Peter Kogge * Critical Information in IMAGE
This addresses memory hierarchy intra-processor as well as inter-processor data movement
Level 2 Cache
Level 1 Cache
5 Memory Hierarchy levels in each Processor
Data Movement
Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu

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