| This describes some aspects of a national study of the future of HPCC which started with a meeting in February 1994 at Pasadena |
| The SIA (Semiconductor Industry Association) projections are used to define feasible memory and CPU scenarios |
| We describe hardware architecture with Superconducting and PIM (Processor in Memory possibilities) for CPU and optics for interconnect |
| The Software situation is captured by notes from a working group at June 96 Bodega Bay meeting |
| The role of new algorithms is expected to be very important |
GeneralResearchB96 General Collection of Research Foils --
July--December 1996
KoggePimTalk Processing-In-Memory (PIM) Architectures
for Very High Performance MPP Computing
GeneralResFoils96 Miscellaneous Presentation Material used in
1996
CornellHPCCOverview96MasterMaster Foils for A Short Overview of HPCC
-- From GigaFlops to PetaFlops and From
Tightly Coupled MPP's to the World Wide
Web
CPS615-95B Master Set B of Overview Material on
Parallel Computing for CPS615 Foils
PetaSoft Summary of Working Groups at PAWS and
PetaSoft Meetings
GeneralResearchB96 013 001 Status of "Classic" HPCC
-- June1996
Futures-2: Petaflops and Real
Software in 2007?
GeneralResearchB96 014 002 Abstract of HPCC Futures 2:
PetaFlop in 2007!
KoggePimTalk 008 003 Petaflop Chain of Events
GeneralResearchB96 017 004 Overall Remarks on the March to
PetaFlops - I
GeneralResearchB96 018 005 Overall Remarks on the March to
PetaFlops - II
GeneralResFoils96 031 006 Petaflop Performance for Flow in
Porous Media?
GeneralResFoils96 032 007 Target Flow in Porous Media
Problem (Glimm - Petaflop
Workshop)
GeneralResFoils96 033 008 NASA's Projection of Memory and
Computational Requirements upto
Petaflops for Aerospace
Applications
CornellHPCCOverview96Master 018 009 Peak Supercomputer Performance
KoggePimTalk 011 010 Pasadena Architectures
CPS615-95B 047 011 Chip Density Projections to year
2013
CPS615-95B 051 012 Clock Speed and I/O Speed in
megabytes/sec per pin through
year 2013
KoggePimTalk 010 013 PetaFlops Applications
CornellHPCCOverview96Master 005 014 Supercomputer Architectures in
Years 2005-2010 -- I
CornellHPCCOverview96Master 006 015 Supercomputer Architectures in
Years 2005-2010 -- II
CornellHPCCOverview96Master 007 016 Supercomputer Architectures in
Years 2005-2010 -- III
KoggePimTalk 023 017 Current PIM Chips
KoggePimTalk 030 018 New "Strawman" PIM
Processing Node Macro
KoggePimTalk 031 019 "Strawman" Chip
Floorplan
KoggePimTalk 038 020 SIA-Based PIM Chip Projections
CornellHPCCOverview96Master 008 021 Comparison of Supercomputer
Architectures
CornellHPCCOverview96Master 009 022 Algorithm and Software Challenges
-- The Latency Agenda!
PetaSoft 002 023 Overall Suggestions -- I
PetaSoft 003 024 Overall Suggestions - II
PetaSoft 004 025 Other Suggested Point Designs
PetaSoft 005 026 Latency Research Is Needed
PetaSoft 006 027 Geometric Structure of Problems
and Computers
PetaSoft 007 028 Memory Hierarchy versus
Distribution
PetaSoft 008 029 Needed Algorithm/Application
Evaluations
PetaSoft 019 030 Application Oriented Software
Issues -- April 24,1996
PetaSoft 020 031 Language Related Issues
PetaSoft 021 032 Library and Tool Issues
PetaSoft 022 033 Operating System Issues - I
PetaSoft 023 034 Operating System Issues - II
PetaSoft 024 035 "Initial" Findings of
the "Implementation"
Subgroup at PetaSoft 96
PetaSoft 025 036 Initial Thoughts I
PetaSoft 028 037 Initial Thoughts II
PetaSoft 026 038 The MPI Program Execution Model
PetaSoft 027 039 The PetaSoft Program Execution
Model
PetaSoft 032 040 Findings 1) and 2) -- Memory
Hierarchy
PetaSoft 033 041 Findings 3) and 4) -- Using Memory
Hierarchy
PetaSoft 034 042 Findings 5) and 6) -- Layered
Software
PetaSoft 035 043 The Layered Software Model
PetaSoft 036 044 Some Examples of a Layered
Software System
PetaSoft 037 045 Finding 7) Testbeds
PetaSoft 038 046 Findings 8) and 9) Applications
PetaSoft 039 047 Findings 10) to 14) General Points
GeneralResearchB96 General Collection of Research Foils --
July--December 1996
13 14 17 18
KoggePimTalk Processing-In-Memory (PIM) Architectures
for Very High Performance MPP Computing
8 11 10 23 30 31 38
GeneralResFoils96 Miscellaneous Presentation Material used in
1996
31 32 33
CornellHPCCOverview96MasterMaster Foils for A Short Overview of HPCC
-- From GigaFlops to PetaFlops and From
Tightly Coupled MPP's to the World Wide
Web
18 5 6 7 8 9
CPS615-95B Master Set B of Overview Material on
Parallel Computing for CPS615 Foils
47 51
PetaSoft Summary of Working Groups at PAWS and
PetaSoft Meetings
2 3 4 5 6 7 8 19 20 21 22 23 24 25 28 26 27 32 33 34 35 36 37 38 39
GeneralResearchB96 General Collection of Research Foils --
July--December 1996
13 14 17 18
KoggePimTalk Processing-In-Memory (PIM) Architectures
for Very High Performance MPP Computing
8 10 11 23 30 31 38
GeneralResFoils96 Miscellaneous Presentation Material used in
1996
31 32 33
CornellHPCCOverview96MasterMaster Foils for A Short Overview of HPCC
-- From GigaFlops to PetaFlops and From
Tightly Coupled MPP's to the World Wide
Web
5 6 7 8 9 18
CPS615-95B Master Set B of Overview Material on
Parallel Computing for CPS615 Foils
47 51
PetaSoft Summary of Working Groups at PAWS and
PetaSoft Meetings
2 3 4 5 6 7 8 19 20 21 22 23 24 25 26 27 28 32 33 34 35 36 37 38 39