Full Index for Scripted foilset 
| This uses material from Paul Smith and Peter Kogge as well as Fox |
| We describe the "National PetaFlop Study(s)" and what you can expect with or without a specific initiative |
| We discuss traditional, Processor in Memory, Superconducting, Special Purpose architectures as well as future Quantum Computers! |
| We survey possible applications, new needs and opportunities for software as well as the technologies and designs for new machines one can expect in the year 2007! |
| We review findings of studies and structure of a possible initiative |
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1
Remarks on Petaflop
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Abstract of PetaFlop Presentation Jan 97
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NSTC/Committee on Computing, Information & Communication Meeting PetaFLOPS Workshops Results September 19, 1996 Dr. Paul H. Smith Department of Energy
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Contents
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I. Workshop series... background: PetaFLOPS workshops.
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I. Workshop series... background: Community & Sponsoring Agencies
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I. Workshop series... background: Workshops Purposes
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Title of foil 6
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Title of foil 7
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Peak Supercomputer Performance
11
Some Important Trends -- COTS is King!
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Comments on COTS for Hardware
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Returning to Today - I
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Returning to Today - II
15
Overall Remarks on the March to PetaFlops - I
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Overall Remarks on the March to PetaFlops - II
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II. Major Findings & Recommendations: Findings.
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II. Major Findings & Recommendations: Findings.
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II. Major Findings & Recommendations: Recommendations
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II. Major Findings & Recommendations: Recommendations
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PP Presentation
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III. Key drivers for advanced computational capabilities beyond HPCC. Why PetaFLOPS??
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III. Key drivers: The State of the Art
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III. Key drivers: The Need for PetaFLOPS Computing
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10 Possible PetaFlop Applications
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Petaflop Performance for Flow in Porous Media?
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Target Flow in Porous Media Problem (Glimm - Petaflop Workshop)
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NASA's Projection of Memory and Computational Requirements upto Petaflops for Aerospace Applications
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Bodega Bay: Primary Memory
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Bodega Bay: Secondary Memory
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Bodega Bay: Aggregate I/O
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III. Key drivers: Technological Limitations
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Chip Density Projections to year 2013
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Clock Speed and I/O Speed in megabytes/sec per pin through year 2013
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Supercomputer Architectures in Years 2005-2010 -- I
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Supercomputer Architectures in Years 2005-2010 -- II
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Supercomputer Architectures in Years 2005-2010 -- III
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Performance Per Transistor
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Comparison of Supercomputer Architectures 
40
Three Major Markets -- Logic,ASIC,DRAM
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Chip and Package Characteristics
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Fabrication Characteristics
43
Electrical Design and Test Metrics
44
Technologies for High Performance Computers
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Architectures for High Performance Computers - I
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Architectures for High Performance Computers - II
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There is no Best Machine!
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Quantum Computing - I
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Quantum Computing - II
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Quantum Computing - III
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Superconducting Technology -- Past
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Superconducting Technology -- Present
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Superconducting Technology -- Problems
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IV. Architecture Point Designs & SW Design Studies: Point Design Study:
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IV. Architecture Point Designs & SW Design Studies: 1996 Point Design Awards
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The 8 NSF Point Designs
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Architecture of MORPH NSF Petaflop Point Study
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Architecture of I-ACOMA Petaflop Point Study
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Some MetaComputer Systems
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The GRAPE N-Body Machine
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GRAPE architecture in NSF Petaflop Point Study
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GRAPE Processing Unit in NSF Petaflop Point Study
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Why isn't GRAPE a Perfect Solution?
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Current PIM Chips
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New "Strawman" PIM Processing Node Macro
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"Strawman" Chip Floorplan
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SIA-Based PIM Chip Projections
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Superconducting Architecture in NSF Petaflop Point Study
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IV. Architecture Point Designs & SW Design Studies: Architectural Framework
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IV. Architecture Point Designs & SW Design Studies: Key SW Development Areas
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IV. Architecture Point Designs & SW Design Studies: Software Implementation Strategy
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Suggested Software Strategy for JNAC (aka Petaflops) Initiative
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Some Key Observations on PetaSoft Software
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Time for a Software Revolution?
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Architectural Framework from PetaSoft Meeting
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Hierarchy from Application to Complex Computer
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The Current HPCC Program Execution Model (PEM) illustratrated by MPI/HPF
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The PetaSoft Program Execution Model
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Some Examples of a Layered Software System
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Features of JNAC Software Implementation Strategy
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Role of The Architecture Review Board
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The Five Key JNAC Software Development Areas
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Examples of Machine Specific Software
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Examples of Operating System Services I
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Examples of Operating System Services II
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General Philosophy from PetaSoft Meeting
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Features of the The Layered Software Model
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PetaSoft Findings 1) and 2) -- Memory Hierarchy
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PetaSoft Findings 3) and 4) -- Using Memory Hierarchy
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PetaSoft Findings 5) and 6) -- Layered Software
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PetaSoft Recommendations 1) to 3) Memory and Software Hierarchy
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III. Key drivers: Summary
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V. A National program concept: Basis
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V. A National program concept: Scope & Strategy
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V. A National program concept: Technology Projection Model
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V. A National program concept: Structure & Flow
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V. A National program concept: Technology Model
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V. A National program concept: Research Projects - Technology
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V. A National program concept: Research Projects - Architecture
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V. A National program concept: Research Projects - System Software
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V. A National program concept: Research Projects - Applications & Algorithms
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V. A National focused program concept: Early Program Milestones
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Now we follow with A Comparison of JNAC and HPCC
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Comparison of HPCC and JNAC - I
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Comparison of HPCC and JNAC - II
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Comparison of HPCC and JNAC - III
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VI. Future actions necessary to mold an R&D program: The Message
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VI. Future actions necessary to mold an R&D program: Near Term Recommendation
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VI. Future actions necessary to mold an R&D program: Next Steps
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VI. Future actions necessary to mold an R&D program: PetaFLOPS Algorithms Workshop (PAL`97)
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VI. Future actions : Next Steps Integrate into Federal R&D Planning Full WebWisdom URL and this Foilset Search
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