| 1 |
Processor in Memory (PIM) Architecture is follow on to J machine (MIT) Execube (IBM -- Peter Kogge) Mosaic (Seitz)
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More Interesting in 2007 as processors are be "real" and have nontrivial amount of memory
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Naturally fetch a complete row (column) of memory at each access - perhaps 1024 bits
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| 2 |
One could take in year 2007 each two gigabyte memory chip and alternatively build as a mosaic of
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One Gigabyte of Memory
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1000 250,000 transistor simple CPU's running at 1 Gigaflop each and each with one megabyte of on chip memory
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| 3 |
12000 chips (Same amount of Silicon as in first design but perhaps more power) gives:
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12 Terabytes of Memory
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12 Petaflops performance
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This design "extrapolates" specialized DSP's , the GRAPE (specialized teraflop N body machine) etc to a "somewhat specialized" system with a general CPU but a special memory poor architecture with particular 2/3D layout
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