Basic HTML version of Foils prepared 17 November 1998

Foil 154 Comparison of Supercomputer Architectures

From Master Foilset for HPC Achitecture Overview CPS615 Basic Simulation Track for Computational Science -- Fall Semester 98. by Geoffrey C. Fox


1 Fixing 10-20 Terabytes of Memory, we can get
2 16000 way parallel natural evolution of today's machines with various architectures from distributed shared memory to clustered heirarchy
  • Peak Performance is 150 Teraflops with memory systems like today but worse with more levels of cache
3 5000 way parallel Superconducting system with 1 Petaflop performance but terrible imbalance between CPU and memory speeds
4 12 million way parallel PIM system with 12 petaflop performance and "distributed memory architecture" as off chip access with have serious penalities
5 There are many hybrid and intermediate choices -- these are extreme examples of "pure" architectures

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