Basic HTML version of Foils prepared 17 November 1998

Foil 10 3 Classes of VLSI Design?

From Master Foilset for HPC Achitecture Overview CPS615 Basic Simulation Track for Computational Science -- Fall Semester 98. by Geoffrey C. Fox
How good is instruction-level parallelism?
Thread-level parallelism needed in future microprocessors to use available transistors?
Threads need classic coarse grain data or functional parallelism
transistors
Exponential Improvement is (an example of) Moore's Law

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