Basic HTML version of Foils prepared 17 November 1998

Foil 153 Performance Per Transistor

From Master Foilset for HPC Achitecture Overview CPS615 Basic Simulation Track for Computational Science -- Fall Semester 98. by Geoffrey C. Fox
Performance data from uP vendors
Transistor count excludes on-chip caches
Performance normalized by clock rate
Conclusion: Simplest is best! (250K Transistor CPU)
Millions of Transistors (CPU)
Millions of Transistors (CPU)
Normalized SPECINTS
Normalized SPECFLTS

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