Strawman Properties

Strawman Properties

• Huge bandwidths available to processing logic
  • “Free” 4 line cache at the sense amps
  • Minimal addressing delays => minimal latency
• Tremendous internode bandwidths
  • “Built in” local shared memory
• Huge bandwidths available at chip periphery
• 2D tiling prevents wires “over memory”
• Opportunity for “mix and match”
  • Memory macros
  • Processing logic
  • External I/O protocols

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