Basic HTML version of Foils prepared 17 November 98

Foil 15 Sequential Memory Structure

From Master Foilset for HPC Achitecture Overview CPS615 Introduction to Computational Science -- Fall Semester 1998. by Geoffrey C. Fox
1 Data locality implies CPU finds information it needs in cache which stores most recently accessed information
2 This means one reuses a given memory reference in many nearby computations e.g.
3 A1 = B*C
4 A2 = B*D + B*B
5 .... Reuses B
6 L3 Cache
7 Main
8 Memory
9 Disk
10 Increasing Memory
11 Capacity Decreasing
12 Memory Speed (factor of 100 difference between processor
13 and main memory
14 speed)
in Table To:

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