Full Index for Basic foilset 
| This presentation came from material developed by David Culler and Jack Dongarra available on the Web |
| See summary of Saleh Elmohamed and Ken Hawick at http://nhse.npac.syr.edu/hpccsurvey/ |
| We discuss several examples in detail including T3E, Origin 2000, Sun E10000 and Tera MTA |
| These are used to illustrate major architecture types |
| We discuss key sequential architecture issues including cache structure |
| We also discuss technologies from today's commodities through Petaflop ideas and Quantum Computing |
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1
Computer Architecture for Computational Science
2
Abstract of Computer Architecture Overview
3
Some NPAC Parallel Machines
4
Architectural Trends I
5
Architectural Trends
6
3 Classes of VLSI Design?
7
Architectural Trends: Bus-based SMPs
8
Bus Bandwidth
9
Economics
10
Important High Performance Computing Architectures
11
Some General Issues Addressed by High Performance Architectures
12
What is a Pipeline -- Cafeteria Analogy?
13
Example of MIPS R4000 Floating Point
14
MIPS R4000 Floating Point Stages
15
Sequential Memory Structure
16
Cache Issues I
17
Cache Issues II
18
Spatial versus Temporal Locality I
19
Spatial versus Temporal Locality II
20
Parallel Computer Memory Structure
21
Cache Coherence
22
Raw Uniprocessor Performance: Cray v. Microprocessor LINPACK n by n Matrix Solves
23
Raw Parallel Performance: LINPACK
24
Linear Linpack HPC Performance versus Time
25
Top 10 Supercomputers November 1998
26
Distribution of 500 Fastest Computers
27
CPU Technology used in Top 500 versus Time
28
Geographical Distribution of Top 500 Supercomputers versus time
29
Node Technology used in Top 500 Supercomputers versus Time
30
Total Performance in Top 500 Supercomputers versus Time and Manufacturer
31
Number of Top 500 Systems as a function of time and Manufacturer
32
Total Number of Top 500 Systems Installed June 98 versus Manufacturer
33
Two Basic Programming Models
34
Shared Address Space Architectures
35
Shared Address Space Model
36
Communication Hardware
37
History -- Mainframe
38
History -- Minicomputer
39
Scalable Interconnects
40
Message Passing Architectures
41
Message-Passing Abstraction e.g. MPI
42
First Message-Passing Machines
43
Mark2 Hypercube built by JPL(1985) Cosmic Cube (1983) built by Caltech (Chuck Seitz)
44
64 Ncube Processors (each with 6 memory chips) on a large board
45
ncube1 Chip -- integrated CPU and communication channels
46
Example of Message Passing System: IBM SP-2
47
Example of Message Passing System: Intel Paragon
48
Clusters of PC's 1986-1998
49
HP Kayak PC (300 MHz Intel Pentium II) vs Origin 2000
50
Cray Vector Supercomputers
51
Cray/SGI memory latencies
52
Architecture of Cray T3E
53
T3E Messaging System
54
Cray T3E Cache Structure
55
Cray T3E Cache Performance
56
Finite Difference Example for T3E Cache Use I
57
Finite Difference Example for T3E Cache Use II
58
How to use Cache in Example I
59
How to use Cache in Example II
60
SGI Origin 2000 I
61
SGI Origin II
62
SGI Origin Block Diagram
63
SGI Origin III
64
SGI Origin 2 Processor Node Board
65
Performance of NCSA 128 node SGI Origin 2000
66
Cache Coherent or Not?
67
Summary of Cache Coherence Approaches
68
SMP Example: Intel Pentium Pro Quad
69
Sun E10000 in a Nutshell
70
Sun Enterprise Systems E6000/10000
71
Starfire E10000 Architecture I
72
Starfire E10000 Architecture II
73
Sun Enterprise E6000/6500 Architecture
74
Sun's Evaluation of E10000 Characteristics I
75
Sun's Evaluation of E10000 Characteristics II
76
Scalability of E1000
77
MPI Bandwidth on SGI Origin and Sun Shared Memory Machines
78
Latency Measurements on Origin and Sun for MPI
79
Tera Multithreaded Supercomputer
80
Tera Computer at San Diego Supercomputer Center
81
Overview of the Tera MTA I
82
Overview of the Tera MTA II
83
Tera 1 Processor Architecture from H. Bokhari (ICASE)
84
Tera Processor Characteristics
85
Tera System Diagram
86
Interconnect / Communications System of Tera I
87
Interconnect / Communications System of Tera II
88
T90/Tera MTA Hardware Comparison
89
Tera Configurations / Performance
90
Performance of MTA wrt T90 and in parallel
91
Tera MTA Performance on NAS Benchmarks Compared to T90
92
Cache Only COMA Machines
93
Examples of Some SIMD machines
94
Consider Scientific Supercomputing
95
Toward Architectural Convergence
96
Convergence: Generic Parallel Architecture
97
SIMD CM 2 from Thinking Machines
98
Official Thinking Machines Specification of CM2
99
GRAPE Special Purpose Machines
100
Quantum ChromoDynamics (QCD) Special Purpose Machines
101
ASCI Red -- Intel Supercomputer at Sandia Full WebWisdom URL and this Foilset Search
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