Basic HTML version of Foils prepared 17 November 98

Foil 89 Tera Configurations / Performance

From Master Foilset for HPC Achitecture Overview CPS615 Introduction to Computational Science -- Fall Semester 1998. by Geoffrey C. Fox
Tera Architecture and System Links for Foil 89
1 The overall hardware configuration of the system:
2 Processors 16 64 256
3 Peak Gflops 16 64 256
4 Memory, Gbytes 16-32 64-128 256-512
5 HIPPI channels 32 128 512
6 I/O, Gbytes/sec 6.2 25 102
in Table To:

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