Basic HTML version of Foils prepared 17 November 98

Foil 4 Architectural Trends I

From Master Foilset for HPC Achitecture Overview CPS615 Introduction to Computational Science -- Fall Semester 1998. by Geoffrey C. Fox
1 Architecture translates technology's gifts to performance and capability
2 Resolves the tradeoff between parallelism and locality
  • Current microprocessor: 1/3 compute, 1/3 cache, 1/3 off-chip connect
  • Tradeoffs may change with scale and technology advances
3 Four generations of architectural history: tube, transistor, IC, VLSI
  • Here focus only on VLSI generation
  • Future generations COULD be Quantum and Superconducting technology
4 Greatest delineation within VLSI generation has been in type of parallelism exploited
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