Basic HTML version of Foils prepared 17 November 98

Foil 51 Cray/SGI memory latencies

From Master Foilset for HPC Achitecture Overview CPS615 Introduction to Computational Science -- Fall Semester 1998. by Geoffrey C. Fox
Interesting Article from SC97 proceedings on T3E performance
1 System Memory Clock Ratio FP ops FP ops to cover
2 latency speed per clock memory
3 [ns] [ns] period latency
4 CDC 7600 275 27.5 10 1 10
5 CRAY 1 150 12.5 12 2 24
6 CRAY 120 8.5 14 2 28
7 X-MP
8 SGI Power
9 Challenge ~760 13.3 57 4 228
10 CRAY
11 T3E-900 ~280 2.2 126 2 252
12 This and following foils from Performance of the CRAY T3E Multiprocessor by Anderson, Brooks, Grassi and Scott at http://www.cray.com/products/systems/crayt3e/1200/performance.html
in Table To:

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