Basic HTML version of Foils prepared June 1996

Foil 19 Modern "Alternative" RAMs

From Processing-In-Memory (PIM) Architectures for Very High Performance MPP Computing PAWS 96 Mandalay Beach -- April 21-26 1996. by Peter Kogge Notre Dame
1 Nibble, Page, Fast Page Mode
2 Video RAMs
3 Pipelined Extended Data Out RAMs
4 Dual Bank Synchronous RAMs
5 Block Transfer RAMBUS
6 We are adding logic to speed up bandwidth,
7 BUT STILL LIMITED BY TAKING DATA OFF CHIP!
in Table To:

Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu

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