From Processing-In-Memory (PIM) Architectures for Very High Performance MPP Computing PAWS 96 Mandalay Beach -- April 21-26 1996. byPeter Kogge Notre Dame
Combined Memory Bus/Chip Control
"Look like memory" to a host
Memory mapped SIMD Instruction Broadcast
Memory mapped I/O (esp. System) Control
Chip to Chip Links to support scalable MPPs
External system links:
To other chip clusters
To high speed I/O
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