1 |
Processors directly connected to only certain other processors, and must go multiple hops to get to additional processors. Also called store-and-forward.
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2 |
Usually distributed memory
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3 |
Examples:
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ring
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mesh, torus
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hypercube -- as in original Caltech/JPL machines
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binary tree
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4 |
Usually NUMA, nonblocking, scalable, upgradable
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5 |
Processor connectivity modeled by a graph in which nodes represent connections between processors. Much theoretical work here but now obsolete (irrelevant) as even if this hardware used, pipelining masks transmission time which ends up not showing term proportional to distance travelled
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