Full Index for Basic foilset 
Secs 59
| Parallel Computer and Network Architecture |
| Overview of Issues including synchronization, granularity and 3 classes of architectures |
| More details on networks |
| More details on system architectures |
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1
Computational Science CPS615
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Abstract of CPS615 Foilsets B 1995 
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Overview of
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3 Major Basic Hardware Architectures
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Examples of the Three Current Concurrent Supercomputer Architectures
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Parallel Computer Architecture Issues
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General Types of Synchronization
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Granularity of Parallel Components
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Types of Parallel Memory Architectures
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Types of Parallel Memory Architectures -- Physical Characteristics
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Diagrams of Shared and Distributed Memories
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Classes of Communication Network include ...
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Survey of Issues in Communication Networks
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Glossary of Useful Concepts in Communication Systems
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Switch and Bus based Architectures
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Point to Point Networks (Store and Forward) -- I
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Examples of Interconnection Topologies
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Degree and Diameter of Ring and Mesh(Torus) Architectures
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Degree and Diameter of Hypercube and Tree Architectures
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Point to Point Networks (Store and Forward) -- II
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Latency and Bandwidth of a Network
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Transfer Time in Microseconds for both Shared Memory Operations and Explicit Message Passing
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Latency/Bandwidth Space for 0-byte message(Latency) and 1 MB message(bandwidth).
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Switches versus Processor Networks
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Circuit Switched Networks
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Let's Return to General Parallel Architectures in more detail
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Overview of Computer Architecture Issues
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Some Global Computer Architecture Issues
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Two General Real World Architectural Issues
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MIMD Distributed Memory Architecture
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Some MIMD Architecture Issues
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SIMD (Single Instruction Multiple Data) Architecture
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SIMD Architecture Issues
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Shared Memory Architecture
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The General Structure of a full sized CRAY C-90
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The General Structure of a NEC SX-3
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Comparison of MIMD and SIMD Parallelism seen on Classic Vector Supercomputers
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Shared versus Distributed Memory
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What will happen in the year 2015 with .05 micron feature size and Petaflop Supercomputers using CMOS
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CMOS Technology and Parallel Processor Chip Projections
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Processor Chip Requirements for a Petaflop Machine Using 0.05 Micron Technology
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Three Designs for a Year 2015 Petaflops machine with 0.05 micron technology
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The Global Shared Memory Category I Petaflop Architecture
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Category II Petaflop Architecture -- Network of microprocessors
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Category III Petaflop Design -- Processor in Memory (PIM)
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Necessary Latency to Support Three Categories
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Chip Density Projections to year 2013
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DRAM Chip count for Construction of Petaflop computer in year 2013 using 64 Gbit memory parts
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Memory Chip Bandwidth in Gigabytes/sec
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Power and I/O Bandwidth (I/O Connections) per Chip throught the year 2013
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Clock Speed and I/O Speed in megabytes/sec per pin through year 2013
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Rules for Making Hypercube Network Topologies
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Mapping of Hypercubes into Three Dimensional Meshes
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Mapping of Hypercubes into One Dimensional Systems
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The One dimensional Mapping can be thought of as for one dimensional problem solving or one dimensional layout of chips forming hypercube
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Hypercube Versus Mesh Topologies
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Switches Versus Networks versus Fat Meshes
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Basic Parallel Computer Architecture
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Shared and Hierarchical Memory Computers
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Homogeneous and Hierarchical Memory Multicomputers
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Cache Coherency
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Hybrid Distributed/Shared Memory Architectures
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The INTEL Delta MIMD Distributed Memory Machine
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Delta System Overview
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Delta System Architecture
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Delta System Hardware Configuration
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Characteristics of INTEL i860 Compute Node
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Delta System Communication Network
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Delta Comunication Network (cont'd)
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Road Map to Paul Messina's Chapter 2 of Parallel Computing Works -- I
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Road Map to Paul Messina's Chapter 2 of Parallel Computing Works -- II
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Road Map to Paul Messina's Chapter 2 of Parallel Computing Works -- III
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Road Map to Paul Messina's Chapter 2 of Parallel Computing Works -- IV
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Performance of High End Machines Years 1940-2000
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Performance of High End Machines Years 1980-2000 Full WebWisdom URL and this Foilset Search
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