Basic HTML version of Foils prepared 21 October 1995

Foil 24 Switches versus Processor Networks

From New CPS615 Foils-- B 28 August 95 CPS615 Basic Simulation Track for Computational Science -- Fall Semester 95. by Geoffrey C. Fox


Note that the processor networks such as torus or hypercube can be used to build switches when one does not put processors on internal nodes but rather "just" switch chips.
Thus switches are discussed with same trade-offs -- store and forward, circuit-switched as processor networks.
Switch based machines have typically the same delay (travel time) between any two processors
In Processor networks, some machines can be nearer to each other if fewer hops
BUT in all modern machines, low level hardware essentially makes all these architectures the SAME. There are only two times of importance corresponding to DATA LOCALITY or not
  • Time to access memory on processor
    • This further divides into time to get to main DRAM and time to get to cache
  • Time to access memory off processor
  • Here time covers both latency and bandwidth.



© on Tue Oct 7 1997