Basic HTML version of Foils prepared 21 October 1995

Foil 45 Category III Petaflop Design -- Processor in Memory (PIM)

From New CPS615 Foils-- B 28 August 95 CPS615 Basic Simulation Track for Computational Science -- Fall Semester 95. by Geoffrey C. Fox
1 See Chapter 6 of Petaflops Report -- July 94
2 This design is an extrapolation of systems such as the J machine(Dally), Execube (Loral) or Mosaic(Seitz). It features CPU and memory integrated on the chip (PIM).
3 Unlike such systems today, in the year 2015 such PIM designs have substantial memory per processor
in Table To:

© on Tue Oct 7 1997