| 1 |
Note that the processor networks such as torus or hypercube can be used to build switches when one does not put processors on internal nodes but rather "just" switch chips.
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| 2 |
Thus switches are discussed with same trade-offs -- store and forward, circuit-switched as processor networks.
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| 3 |
Switch based machines have typically the same delay (travel time) between any two processors
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| 4 |
In Processor networks, some machines can be nearer to each other if fewer hops
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| 5 |
BUT in all modern machines, low level hardware essentially makes all these architectures the SAME. There are only two times of importance corresponding to DATA LOCALITY or not
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Time to access memory on processor
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This further divides into time to get to main DRAM and time to get to cache
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Time to access memory off processor
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Here time covers both latency and bandwidth.
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