Scripted HTML version of Foils prepared 11 November 1996
Foil 3 Parallel Computer Architecture Control Structure
From CPS615-Lecture on Computer Architectures and Networks Delivered Lectures of CPS615 Basic Simulation Track for Computational Science -- 12 September 96. byGeoffrey C. Fox * Secs 108
SIMD -lockstep synchronization
Each processor executes same instruction stream
MIMD - Each Processor executes independent instruction streams
MIMD Synchronization can take several forms
Simplest: program controlled message passing
"Flags" (barriers,semaphores) in memory - typical shared memory construct as in locks seen in Java Threads
Special hardware - as in cache and its coherency (coordination between nodes)