Design space exploration with the M5 simulator

Project Information

Discipline
Computer Science (401) 
Orientation
Research 
Abstract

The project involves exploring a large design space for a heterogeneous single-chip multiprocessor that has a single out-of-order core and several simple in-order cores. Goals involve successful simulation with small workloads of an adequate number of configurations needed to use a tool (GPRS) that generates a performance model for further study. In addition, goals include successful simulation with larger workloads to verify conclusions formed from GPRS and the smaller simulations.

Intellectual Merit

Exploration of a large design space for a heterogeneous single chip multiprocessor

Broader Impacts

Providing a successful simulation with small workloads of an adequate number of configurations needed to use a tool (GPRS) that generates a performance model for further study. I

Project Contact

Project Lead
Katherine Holcomb (kholcomb) 
Project Manager
Katherine Holcomb (kholcomb) 

Resource Requirements

Hardware System
  • I don't care (what I really need is a software environment and I don't care where it runs)
 
Use of FutureGrid

Using Genesis II software already configured on FutureGrid resources to perform computation

Scale of Use

Multiple runs of 500-1000 jobs. Each job runs several hours to 2+ days.

Project Timeline

Submitted
03/24/2011 - 13:03 
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