Design space exploration with the M5 simulator
Abstract
The project involves exploring a large design space for a heterogeneous single-chip multiprocessor that has a single out-of-order core and several simple in-order cores. Goals involve successful simulation with small workloads of an adequate number of configurations needed to use a tool (GPRS) that generates a performance model for further study. In addition, goals include successful simulation with larger workloads to verify conclusions formed from GPRS and the smaller simulations.
Intellectual Merit
Exploration of a large design space for a heterogeneous single chip multiprocessor
Broader Impact
Providing a successful simulation with small workloads of an adequate number of configurations needed to use a tool (GPRS) that generates a performance model for further study. I
Use of FutureGrid
Using Genesis II software already configured on FutureGrid resources to perform computation
Scale Of Use
Multiple runs of 500-1000 jobs. Each job runs several hours to 2+ days.
Futuregrid is a resource provider for