Basic IMAGE version of Foils prepared August 24 1996
Foil 1 Technology Projections
From Some Numerical Memory and MicroProcessor Projections for PetaFlops JNAC (PetaFlops) Presentation -- August 28,1996. byPeter Kogge Notre Dame Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu If you have any comments about this server, send e-mail to webmaster@npac.syr.edu.
1
Technology Projections 2
Conventional Microprocessor Unit Performance Path 3
Primary Memory Chip Cost 4
Notes on Primary Memory $ 5
Bodega Bay Petaflops Applications Characteristics 6
Achieving 1 PF vs Bodega Bay Applications
Click outside pointer rectangle to move pointer
Click on Pointer to Hide
Click on Pointer + ALT to toggle message hiding
Click on Pointer + CNTL to abolish pointer
Click on Pointer + Shift to cycle families
Click outside + Alt is Change Image
Click outside + Control is Double Size
Click outside + Shift is Halve Size
Right Mouse Down on Pointer Toggles Index
Shift Right Mouse aligns top with scrolled Page While With Mouse Down on Current Pointer h hides This Message while m restores i Toggles Index Aligned with Page Top j Toggles Index Aligned with Scrolled View Top a Abolishes Pointer while CNTL-Click restores f cycles through pointer families c cycles through members of a family u increases Size Up and d decreases Down Mouse Up-Down between changes of Pointer to process new option