Basic IMAGE version of Foils prepared August 24 1996

Foil 4 Notes on Primary Memory $

From Some Numerical Memory and MicroProcessor Projections for PetaFlops JNAC (PetaFlops) Presentation -- August 28,1996. by Peter Kogge Notre Dame
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Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu

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Table of Contents for Some Numerical Memory and MicroProcessor Projections for PetaFlops

1 Technology Projections
2 Conventional Microprocessor Unit Performance Path
3 Primary Memory Chip Cost
4 Notes on Primary Memory $
5 Bodega Bay Petaflops Applications Characteristics
6 Achieving 1 PF vs Bodega Bay Applications
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