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Basic foilset Some Numerical Memory and MicroProcessor Projections for PetaFlops

Given by Peter Kogge Notre Dame at JNAC (PetaFlops) Presentation on August 28,1996. Foils prepared August 24 1996
Outside Index Summary of Material


This was part of a set of PetaFlop (JNAC) Presentations to group of Federal Program Managers
JNAC = Joint National Advanced Computing Initiative
This uses Moore's Law Projections of Technology for Logic and Memory
and uses Bodega Bay Application Analysis to cost memory for a "realistic" machine

Table of Contents for full HTML of Some Numerical Memory and MicroProcessor Projections for PetaFlops

Denote Foils where Image Critical
Denote Foils where HTML is sufficient

1 Technology Projections
2 Conventional Microprocessor Unit Performance Path
3 Primary Memory Chip Cost
4 Notes on Primary Memory $
5 Bodega Bay Petaflops Applications Characteristics
6 Achieving 1 PF vs Bodega Bay Applications

Outside Index Summary of Material



HTML version of Basic Foils prepared August 24 1996

Foil 1 Technology Projections

From Some Numerical Memory and MicroProcessor Projections for PetaFlops JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
Slope of Each: approx 2.7X every 3 years

HTML version of Basic Foils prepared August 24 1996

Foil 2 Conventional Microprocessor Unit Performance Path

From Some Numerical Memory and MicroProcessor Projections for PetaFlops JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
Assumes:
* 100% efficient utilization
* SIA Growth in Clock Rate
* Growth in instruction issue parallelism
In 2004 technology (for 2007 machine)
160,000 such processors gives 1 PF peak.
Problem: each requires caches, memory, I/O!

HTML version of Basic Foils prepared August 24 1996

Foil 3 Primary Memory Chip Cost

From Some Numerical Memory and MicroProcessor Projections for PetaFlops JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
$1 Billion
$10 Million

HTML version of Basic Foils prepared August 24 1996

Foil 4 Notes on Primary Memory $

From Some Numerical Memory and MicroProcessor Projections for PetaFlops JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
$ are chip costs along (packaging, cooling, "batteries" extra)
  • Thus 10 TB in 1998 technology is $100M
"% of Petaflops Apps" refers to Bodega Bay Applications
  • Thus somewhat more than 50% of Bodega Bay apps require less than 1 TB for execution
Real systems probably require some multiple of this memory for next app preload, I/O buffers, etc.

HTML version of Basic Foils prepared August 24 1996

Foil 5 Bodega Bay Petaflops Applications Characteristics

From Some Numerical Memory and MicroProcessor Projections for PetaFlops JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
PETABYTE
TERABYTE
15 min
1 Day
1 Year

HTML version of Basic Foils prepared August 24 1996

Foil 6 Achieving 1 PF vs Bodega Bay Applications

From Some Numerical Memory and MicroProcessor Projections for PetaFlops JNAC (PetaFlops) Presentation -- August 28,1996. *
Full HTML Index
10 TB Primary Memory supports almost all apps whose run time is under 1 day + over half of those that run > 1 day.
For 2007 conventional machine, using 2004 technology and a mere 10 TB primary memory
  • Approx. 20,000 DRAM chips @ $10M chip cost
  • AT LEAST 160,000 of state of art microprocessors
  • Problem: 1 memory chip/8 uPs fails bandwidth test!!!
At $1,000 per uP (cache, cooling, ...), this is approx
  • $200M machine
  • 1M sq. cm. of silicon

Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu

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