Basic HTML version of Foils prepared June 1996

Foil 19 Modern "Alternative" RAMs

From Processing-In-Memory (PIM) Architectures for Very High Performance MPP Computing PAWS 96 Mandalay Beach -- April 21-26 1996. by Peter Kogge Notre Dame
Nibble, Page, Fast Page Mode
Video RAMs
Pipelined Extended Data Out RAMs
Dual Bank Synchronous RAMs
Block Transfer RAMBUS
We are adding logic to speed up bandwidth,
BUT STILL LIMITED BY TAKING DATA OFF CHIP!

Northeast Parallel Architectures Center, Syracuse University, npac@npac.syr.edu

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